Product Summary

The H5TQ2G83BFR is a 2,147,483,648-bit CMOS Double Data Rate III (DDR3) Synchronous DRAM, ideally suited for the main memory applications which requires large memory density and high bandwidth. Hynix 2Gb DDR3 SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock. While all addresses and control inputs are latched on the rising edges of the CK (falling edges of the CK), Data, Data strobes and Write data masks inputs are sampled on both rising and falling edges of it. The data paths are internally pipelined and 8-bit prefetched to achieve very high bandwidth.

Parametrics

H5TQ2G83BFR absolute maximum ratings: (1) VDD Voltage on VDD pin relative to Vss - 0.4 V ~ 1.975 V; (2)VDDQ Voltage on VDDQ pin relative to Vss - 0.4 V ~ 1.975 V; (3)VIN, VOUT Voltage on any pin relative to Vss - 0.4 V ~ 1.975 V; (4)TSTG Storage Temperature -55 to +100 oC.

Features

H5TQ2G83BFR features: (1)Auto Self Refresh supported; (2)JEDEC standard 82ball FBGA(×4/×8), 96ball FBGA; (3)Driver strength selected by EMRS; (4)Dynamic On Die Termination supported; (5)Asynchronous RESET pin supported; (6)ZQ calibration supported; (7)TDQS (Termination Data Strobe) supported (×8 only); (8)Write Levelization supported; (9)8 bit pre-fetch.

Diagrams

H5TQ2G83BFR block diagram